README.md
# Solar Battery Charger Module ā tscircuit fabrication revision
This is a native tscircuit recreation of embeddedalpha's Solar Battery Charger Module, corrected into a coherent 1-cell Li-ion design. Every electrical connection is a tscircuit `<trace>` and all routed PCB copper is produced by tscircuit's built-in default autorouter. There are no manual PCB trace paths, imported copper routes, or post-route copper edits.
## Electrical configuration
- Input: a 21 V-class solar panel with Vmp near 17.8 V and Voc below the BQ24650 limit
- Charger: TI BQ24650 synchronous buck, configured for a 4.2 V 1S Li-ion cell
- Charge current: 2 A nominal (`40 mV / 20 mĪ©`); use an adequately rated panel, normally at least 10ā12 W
- MPPT regulation: about 17.83 V (`1.2 V Ć (1 + 499 kĪ© / 36 kĪ©)`)
- Battery connector: `BAT+ / 10 kĪ© NTC / BAT-`; use a 103AT-compatible pack thermistor
- Gauge: ST STC3115AIQT with a 5 mĪ© low-side shunt and separate CG/GND Kelvin links
- Output: TI TPS63031 fixed 3.3 V buck-boost, enabled by `OUT_EN`
- Control: `CHARGE_DISABLE` is active high; `OUT_EN` defaults low through 1 MĪ©
The board is a charger and gauge, not a certified cell-protection circuit. Use a protected 1S pack.
## PCB and routing
- Reference-matched four-tab outline, uniformly scaled 1.9Ć to 66.12 Ć 57.00 mm overall
- Eight exposed top-and-bottom edge contacts surrounding the reference semicircular routed openings
- 2-layer, 1.2 mm FR-4, 1 oz copper, black mask, white silkscreen, ENIG target
- 0.15 mm minimum/signal trace, 0.10 mm routed copper clearance, and 0.15 mm different-net pad gap
- 0.60 mm charging/battery paths, 0.40 mm local power/GND, and 0.30 mm 3.3 V output paths
- 0.15 mm hole / 0.35 mm land vias, including exposed-pad thermal vias
- Top and bottom GND pours
- `autorouter={{ preset: "default", traceClearance: "0.1mm" }}` with no alternate router or effort override
The generated via-in-pad locations require JLCPCB's filled-and-capped via-in-pad process. The contact-bearing routed edges must be plated and ENIG finished. Use the exact order recipe in `JLCPCB_ORDER_NOTES.txt`; do not select 2 oz copper because this layout targets JLCPCB's 1 oz 0.10/0.10 mm process.
## Reproduce and validate
```bash
bun install
bun run typecheck
bunx tsci check schematic-placement
bunx tsci check placement
bunx tsci check netlist
bunx tsci build index.circuit.tsx --disable-parts-engine --ignore-pin-specification-drc
bun run audit
bunx tsci check shorts dist/index/circuit.json --mode gerber --layer all --pixels-per-mm 50
```
The pin-specification ignore flag applies only to incomplete `requiresPower`/`requiresGround` metadata on generic EasyEDA imports. It does not ignore placement, routing, copper-clearance, connectivity, or shorts errors. The release JSON has all 40 logical nets physically connected and zero error records.
## Release outputs
- `index.circuit.tsx` ā native editable source, package version 1.0.4
- `imports/` ā catalog footprints for the connectors, controller ICs, dual MOSFET, inductors, gauge, and buck-boost IC
- `dist/index/circuit.json` ā routed source of truth
- `dist/index/pcb.svg`, `pcb.png`, `schematic.svg`, and `schematic.png` ā final previews
- `fabrication/solar-battery-charger-gerbers.zip` ā PCB Gerbers and drills only
- `fabrication/solar-battery-charger-assembly-bom.csv` ā JLCPCB grouped BOM
- `fabrication/solar-battery-charger-pick-and-place.csv` ā top-side centroid file
- `fabrication/parts-availability-2026-08-17.csv` ā positive-stock snapshot for all 34 LCSC codes
- `fabrication/solar-battery-charger-kicad.zip` ā optional interchange export; Gerbers remain the manufacturing source of truth
- `patches/` ā reproducible copper-pour correctness patch
Read `FABRICATION.md`, `JLCPCB_ORDER_NOTES.txt`, and `VALIDATION.md` before ordering. Inventory can change after the recorded stock check, so confirm all 34 lines remain available in JLCPCB's parts-confirmation screen.
## Deliberate corrections to the reference
The reference mixes a 12.6 V feedback divider with single-cell charger/gauge circuitry, leaves the BQ24650 TS input floating, and labels an LT1129 linear stage as though it were a switching 3.3 V supply. This revision:
- makes the charger and gauge path consistently 1S/4.2 V;
- supplies VREF, current-sense filtering, the NTC network, and analog/Kelvin returns required by the controller;
- removes the duplicate MCP73113 charger;
- replaces the LT1129 stage with the TPS63031 fixed-3.3 V reference topology;
- uses real manufacturer parts, JLCPCB/LCSC codes, and matching footprints; and
- preserves the reference outline and copper-around-semicircular-opening edge contacts.
The Si7288DP is the real dual power MOSFET used by the charger. Its unusual polygon power pads were not replaced with a BGA or a generic substitute.