tscircuit/autorouting-dataset-01
This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
- Version
- 1.0.102
- License
- unset
- Stars
- 4
lib/dataset/circuit150.simple-route.json
{
"bounds": {
"minX": -12,
"maxX": 12,
"minY": -7.5,
"maxY": 7.5
},
"obstacles": [
{
"componentId": "pcb_component_0",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -3.825,
"y": 2.5
},
"width": 0.8,
"height": 0.95,
"connectedTo": [
"pcb_smtpad_0",
"connectivity_net27",
"source_trace_11",
"source_port_11",
"source_trace_5",
"source_port_5",
"source_trace_3",
"source_port_2",
"source_trace_1",
"source_port_0",
"source_net_1",
"pcb_smtpad_0",
"pcb_port_0",
"pcb_smtpad_2",
"pcb_port_2",
"pcb_smtpad_5",
"pcb_port_5",
"pcb_smtpad_11",
"pcb_port_11"
]
},
{
"componentId": "pcb_component_0",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -2.175,
"y": 2.5
},
"width": 0.8,
"height": 0.95,
"connectedTo": [
"pcb_smtpad_1",
"connectivity_net25",
"source_trace_10",
"source_port_10",
"source_trace_0",
"source_port_1",
"source_net_0",
"pcb_smtpad_1",
"pcb_port_1",
"pcb_smtpad_10",
"pcb_port_10"
]
},
{
"componentId": "pcb_component_1",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -4.825,
"y": -4.5
},
"width": 0.8,
"height": 0.95,
"connectedTo": [
"pcb_smtpad_2",
"connectivity_net27",
"source_trace_11",
"source_port_11",
"source_trace_5",
"source_port_5",
"source_trace_3",
"source_port_2",
"source_trace_1",
"source_port_0",
"source_net_1",
"pcb_smtpad_0",
"pcb_port_0",
"pcb_smtpad_2",
"pcb_port_2",
"pcb_smtpad_5",
"pcb_port_5",
"pcb_smtpad_11",
"pcb_port_11"
]
},
{
"componentId": "pcb_component_1",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -3.175,
"y": -4.5
},
"width": 0.8,
"height": 0.95,
"connectedTo": [
"pcb_smtpad_3",
"connectivity_net23",
"source_trace_9",
"source_port_9",
"source_trace_2",
"source_port_3",
"source_net_2",
"pcb_smtpad_3",
"pcb_port_3",
"pcb_smtpad_9",
"pcb_port_9"
]
},
{
"componentId": "pcb_component_2",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 4,
"y": -3.4125
},
"width": 1.4,
"height": 1.025,
"connectedTo": [
"pcb_smtpad_4",
"connectivity_net29",
"source_trace_12",
"source_port_12",
"source_trace_6",
"source_port_6",
"source_trace_4",
"source_port_4",
"source_net_3",
"pcb_smtpad_4",
"pcb_port_4",
"pcb_smtpad_6",
"pcb_port_6",
"pcb_plated_hole_0",
"pcb_port_12"
]
},
{
"componentId": "pcb_component_2",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 4,
"y": -1.5875
},
"width": 1.4,
"height": 1.025,
"connectedTo": [
"pcb_smtpad_5",
"connectivity_net27",
"source_trace_11",
"source_port_11",
"source_trace_5",
"source_port_5",
"source_trace_3",
"source_port_2",
"source_trace_1",
"source_port_0",
"source_net_1",
"pcb_smtpad_0",
"pcb_port_0",
"pcb_smtpad_2",
"pcb_port_2",
"pcb_smtpad_5",
"pcb_port_5",
"pcb_smtpad_11",
"pcb_port_11"
]
},
{
"componentId": "pcb_component_3",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 8.49,
"y": -2.5
},
"width": 0.54,
"height": 0.64,
"connectedTo": [
"pcb_smtpad_6",
"connectivity_net29",
"source_trace_12",
"source_port_12",
"source_trace_6",
"source_port_6",
"source_trace_4",
"source_port_4",
"source_net_3",
"pcb_smtpad_4",
"pcb_port_4",
"pcb_smtpad_6",
"pcb_port_6",
"pcb_plated_hole_0",
"pcb_port_12"
]
},
{
"componentId": "pcb_component_3",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 9.51,
"y": -2.5
},
"width": 0.54,
"height": 0.64,
"connectedTo": [
"pcb_smtpad_7",
"connectivity_net31",
"source_trace_13",
"source_port_13",
"source_trace_8",
"source_port_8",
"source_trace_7",
"source_port_7",
"source_net_4",
"pcb_smtpad_7",
"pcb_port_7",
"pcb_smtpad_8",
"pcb_port_8",
"pcb_plated_hole_1",
"pcb_port_13"
]
},
{
"componentId": "pcb_component_4",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 7.637777815141599,
"y": 3.4029428580865546
},
"width": 0.29700000000000004,
"height": 0.6880736710026844,
"connectedTo": [
"pcb_smtpad_8",
"connectivity_net31",
"source_trace_13",
"source_port_13",
"source_trace_8",
"source_port_8",
"source_trace_7",
"source_port_7",
"source_net_4",
"pcb_smtpad_7",
"pcb_port_7",
"pcb_smtpad_8",
"pcb_port_8",
"pcb_plated_hole_1",
"pcb_port_13"
]
},
{
"componentId": "pcb_component_4",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 7.376977842043551,
"y": 3.333061715908874
},
"width": 0.29700000000000004,
"height": 0.6880736710026844,
"connectedTo": [
"pcb_smtpad_8",
"connectivity_net31",
"source_trace_13",
"source_port_13",
"source_trace_8",
"source_port_8",
"source_trace_7",
"source_port_7",
"source_net_4",
"pcb_smtpad_7",
"pcb_port_7",
"pcb_smtpad_8",
"pcb_port_8",
"pcb_plated_hole_1",
"pcb_port_13"
]
},
{
"componentId": "pcb_component_4",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 8.623022157956449,
"y": 3.666938284091126
},
"width": 0.29700000000000004,
"height": 0.6880736710026844,
"connectedTo": [
"pcb_smtpad_9",
"connectivity_net23",
"source_trace_9",
"source_port_9",
"source_trace_2",
"source_port_3",
"source_net_2",
"pcb_smtpad_3",
"pcb_port_3",
"pcb_smtpad_9",
"pcb_port_9"
]
},
{
"componentId": "pcb_component_4",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": 8.3622221848584,
"y": 3.5970571419134454
},
"width": 0.29700000000000004,
"height": 0.6880736710026844,
"connectedTo": [
"pcb_smtpad_9",
"connectivity_net23",
"source_trace_9",
"source_port_9",
"source_trace_2",
"source_port_3",
"source_net_2",
"pcb_smtpad_3",
"pcb_port_3",
"pcb_smtpad_9",
"pcb_port_9"
]
},
{
"componentId": "pcb_component_5",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -1.825,
"y": -0.5
},
"width": 0.8,
"height": 0.95,
"connectedTo": [
"pcb_smtpad_10",
"connectivity_net25",
"source_trace_10",
"source_port_10",
"source_trace_0",
"source_port_1",
"source_net_0",
"pcb_smtpad_1",
"pcb_port_1",
"pcb_smtpad_10",
"pcb_port_10"
]
},
{
"componentId": "pcb_component_5",
"type": "rect",
"layers": [
"top"
],
"center": {
"x": -0.17500000000000004,
"y": -0.5
},
"width": 0.8,
"height": 0.95,
"connectedTo": [
"pcb_smtpad_11",
"connectivity_net27",
"source_trace_11",
"source_port_11",
"source_trace_5",
"source_port_5",
"source_trace_3",
"source_port_2",
"source_trace_1",
"source_port_0",
"source_net_1",
"pcb_smtpad_0",
"pcb_port_0",
"pcb_smtpad_2",
"pcb_port_2",
"pcb_smtpad_5",
"pcb_port_5",
"pcb_smtpad_11",
"pcb_port_11"
]
},
{
"componentId": "pcb_component_6",
"type": "rect",
"layers": [
"top",
"inner1",
"inner2",
"bottom"
],
"center": {
"x": -10.226725799387117,
"y": 3.1712998127197984
},
"width": 1.5,
"height": 1.5,
"connectedTo": [
"pcb_plated_hole_0",
"connectivity_net29",
"source_trace_12",
"source_port_12",
"source_trace_6",
"source_port_6",
"source_trace_4",
"source_port_4",
"source_net_3",
"pcb_smtpad_4",
"pcb_port_4",
"pcb_smtpad_6",
"pcb_port_6",
"pcb_plated_hole_0",
"pcb_port_12"
]
},
{
"componentId": "pcb_component_6",
"type": "oval",
"layers": [
"top",
"inner1",
"inner2",
"bottom"
],
"center": {
"x": -7.773274200612883,
"y": 3.8287001872802016
},
"width": 1.5,
"height": 1.5,
"connectedTo": [
"pcb_plated_hole_1",
"connectivity_net31",
"source_trace_13",
"source_port_13",
"source_trace_8",
"source_port_8",
"source_trace_7",
"source_port_7",
"source_net_4",
"pcb_smtpad_7",
"pcb_port_7",
"pcb_smtpad_8",
"pcb_port_8",
"pcb_plated_hole_1",
"pcb_port_13"
]
}
],
"connections": [
{
"name": "source_net_0",
"pointsToConnect": [
{
"x": -2.175,
"y": 2.5,
"layer": "top",
"pointId": "pcb_port_1",
"pcb_port_id": "pcb_port_1"
},
{
"x": -1.825,
"y": -0.5,
"layer": "top",
"pointId": "pcb_port_10",
"pcb_port_id": "pcb_port_10"
}
]
},
{
"name": "source_net_1",
"pointsToConnect": [
{
"x": -3.825,
"y": 2.5,
"layer": "top",
"pointId": "pcb_port_0",
"pcb_port_id": "pcb_port_0"
},
{
"x": -4.825,
"y": -4.5,
"layer": "top",
"pointId": "pcb_port_2",
"pcb_port_id": "pcb_port_2"
},
{
"x": 4,
"y": -1.5875,
"layer": "top",
"pointId": "pcb_port_5",
"pcb_port_id": "pcb_port_5"
},
{
"x": -0.17500000000000004,
"y": -0.5,
"layer": "top",
"pointId": "pcb_port_11",
"pcb_port_id": "pcb_port_11"
}
]
},
{
"name": "source_net_2",
"pointsToConnect": [
{
"x": -3.175,
"y": -4.5,
"layer": "top",
"pointId": "pcb_port_3",
"pcb_port_id": "pcb_port_3"
},
{
"x": 8.492622171407424,
"y": 3.631997713002286,
"layer": "top",
"pointId": "pcb_port_9",
"pcb_port_id": "pcb_port_9"
}
]
},
{
"name": "source_net_3",
"pointsToConnect": [
{
"x": 4,
"y": -3.4125,
"layer": "top",
"pointId": "pcb_port_4",
"pcb_port_id": "pcb_port_4"
},
{
"x": 8.49,
"y": -2.5,
"layer": "top",
"pointId": "pcb_port_6",
"pcb_port_id": "pcb_port_6"
},
{
"x": -10.226725799387117,
"y": 3.1712998127197984,
"layer": "top",
"pointId": "pcb_port_12",
"pcb_port_id": "pcb_port_12"
}
]
},
{
"name": "source_net_4",
"pointsToConnect": [
{
"x": 9.51,
"y": -2.5,
"layer": "top",
"pointId": "pcb_port_7",
"pcb_port_id": "pcb_port_7"
},
{
"x": 7.507377828592575,
"y": 3.368002286997714,
"layer": "top",
"pointId": "pcb_port_8",
"pcb_port_id": "pcb_port_8"
},
{
"x": -7.773274200612883,
"y": 3.8287001872802016,
"layer": "top",
"pointId": "pcb_port_13",
"pcb_port_id": "pcb_port_13"
}
]
}
],
"layerCount": 2,
"minTraceWidth": 0.15
}
Related Packages
More from this authortscircuit/dataset-srj12-bus-routingThe code defines electronic circuit diagrams featuring PCB layouts with USB-C, HDMI, and general-purpose chips, connecting their pins with traces, component footprints, and annotations for hardware design.
Similar package0hmX/esp32-s3-usb-webcam-ov2640This code defines and integrates a variety of surface-mount, through-hole, and connector hardware components (including microcontrollers, regulators, resistors, capacitors, and connectors) into a PCB design framework, enabling schematic symbol creation, footprint definition, and automated routing within an electronic circuit layout.
Discover something newastra-abse/t113-s3Allwinner T113-S3 fanout from JLCPCB C5197687: 128 verified escapes, LCD top, storage right; reusable T113S3Module with clean DRC and shorts checks.