imrishabh18/pedometer

scripts/record-fabrication-review.py

"""Record verified local CAD results; retain unapproved factory conditions."""
import hashlib,json
from collections import Counter
from datetime import datetime,timezone
from pathlib import Path
read=lambda name:json.loads(Path(name).read_text())
c=read('dist/index/circuit.json');h=hashlib.sha256(Path('dist/index/circuit.json').read_bytes()).hexdigest()
m=read('review/fabrication-metrics.json');a=read('review/copper-clearance.json');d=read('review/drill-export-audit.json');r=read('review/routing-completeness.json');p=read('review/programming-check.json')
for report in [m,a,d,r,p]:assert report['circuitSha256']==h,'Stale audit; regenerate before recording review'
assert not any(r['errorCounts'].values())
assert p['result']=='PASS'
assert not any(m[k] for k in ['viaPairsBelow02mm','viaHoleToOtherNetTraceBelow02mm','viaHoleToOtherNetPadBelow02mm','viaHoleToOtherNetPourBelow02mm'])
assert min(a['padToTraceMinimum']['mm'],a['traceToTraceMinimum']['mm'])>=.09-1e-6
b=read('review/bga-aperture-audit.json');assert b['manufacturingCircuitSha256']==d['manufacturingCircuitSha256']
for name in ['imported-footprint-audit','passive-gerber-audit']:
 report=read(f'review/{name}.json');assert report['circuitSha256']==h and report['result']=='PASS'
components=[x for x in c if x['type']=='source_component'];assert len(components)==62 and all(x.get('manufacturer_part_number') and x.get('supplier_part_numbers',{}).get('jlcpcb') for x in components)
findings=[
 {'id':'PAD-01','status':'resolved','title':'JLCPCB rejected passive footprints','resolution':'Replaced all 12 rejected references and four additional passives sharing the custom footprint function with exact JLCPCB/EasyEDA imports. All 32 pad shapes, dimensions, pitches and pin assignments match the untouched imports; copper, mask and paste are verified in the exported Gerbers. Electrical values, part numbers and netlist are unchanged.','evidence':'review/imported-footprint-audit.json; review/passive-gerber-audit.json; docs/footprint-correction.md'},
 {'id':'CAD-01','status':'resolved','title':'Fully routed board and programming connector','resolution':'Fresh placement/routing checks, source-trace completeness, port connectivity and trace continuity all pass. All five J4 signals reach the MCU; reset bias is verified. SWCLK is routed in a dedicated top-only autorouting phase.','evidence':'review/routing-completeness.json; review/programming-check.json'},
 {'id':'FAB-01','status':'resolved','title':'Physical drill spans and duplicate hits','resolution':f"Unpatched Gerber exporter 0.0.104 emits {m['uniqueVias']} unique through-vias, four plated USB-C slots and two NPTH holes. No blind/buried or duplicate drill hits.",'evidence':'review/drill-export-audit.json'},
 {'id':'FAB-02','status':'resolved','title':'Copper and drill clearances','resolution':f"Minimum pad-to-trace {a['padToTraceMinimum']['mm']:.6f} mm; trace-to-trace {a['traceToTraceMinimum']['mm']:.6f} mm. Minimum drill-to-pad {m['minimumViaHoleToOtherNetPadMm'][0]:.6f} mm; drill-to-trace {m['minimumViaHoleToOtherNetTraceMm'][0]:.6f} mm. No drill clearance violation below 0.20 mm; antenna keepout/pour intersection is zero.",'evidence':'review/copper-clearance.json; review/fabrication-metrics.json'},
 {'id':'ASM-01','status':'resolved','title':'BGA via-in-pad policy','resolution':f"BGA via-in-pad is permitted. The tscircuit FanoutSolver validates seven interior escapes across U2/U3. Current drill/land overlap counts by component: {dict(Counter(x['reference'] for x in m['viaInPadBalls']))}. No manual via JSX elements are present.",'evidence':'review/bga-via-inventory.json; bga-fanout.ts'},
 {'id':'BOM-01','status':'resolved','title':'PCB passive procurement','resolution':'All 62 PCB components have exact MPNs and JLCPCB codes. Stock was not revalidated for this revision. External battery, NTC, display and cable sourcing are separate.','evidence':'review/jlc-bom.csv'},
 {'id':'DOC-01','status':'resolved','title':'Printable fabrication silkscreen','resolution':'Dense top references are retained in the assembly drawing. Fabrication uses four underside labels at 1.7 mm height and 0.153 mm stroke; copper and drill positions are preserved.','evidence':'manufacturing.ts; review/manufacturing/B_SilkScreen.gbr'},
 {'id':'ASM-02','status':'open','severity':'factory-acceptance','title':'Filled/capped vias, BGA mask, stencil and panel process','requiredAction':f"Approve resin-filled, planarized, copper-capped vias for all {m['uniqueVias']} plated vias ({m['viaInPadCount']} total drill/land overlaps). U2's 0.30 mm via annuli with 0.23 mm mask openings leave 0.035 mm radial overlap, below TI's illustrated 0.05 mm SMD overlap; explicit process acceptance is needed. Other BGA openings retain at least {b['minimumBgaMaskBridgeMm']:.6f} mm mask bridge. Approve the common/stepped stencil, ENIG and handling panel.",'evidence':'docs/assembly-requirements.md; review/bga-aperture-audit.json'},
 {'id':'RF-01','status':'open','severity':'factory-acceptance','title':'RF impedance and stackup confirmation','requiredAction':'Factory CAM must confirm a four-layer, 1.0 mm stackup compatible with the routed 0.20 mm top RF feed, its coplanar spacing and In1_Cu ground reference at 50 ohms. Return geometry changes for rerouting. Antenna tuning, oscillator calibration and range testing follow on prototypes.','evidence':'docs/bare-cc2340r5.md; docs/assembly-requirements.md'},
]
report={'date':datetime.now(timezone.utc).isoformat(),'status':'hold','packageStatus':'ready-for-factory-cam-review','package':'imrishabh18/pedometer','localVersion':read('package.json')['version'],'scope':'CAD and manufacturing export review of the bare CC2340R5 board; no factory process acceptance or physical prototype test has been obtained.','circuitSha256':h,'manufacturingCircuitSha256':d['manufacturingCircuitSha256'],'findings':findings,'references':['https://www.ti.com/lit/ds/symlink/cc2340r5.pdf','https://www.ti.com/lit/ds/symlink/bq25150.pdf','https://www.ti.com/lit/ds/symlink/bq27427.pdf','https://jlcpcb.com/capabilities/pcb-capabilities']}
Path('review/fabrication-review.json').write_text(json.dumps(report,indent=2)+'\n')
lines=['# Bare-chip Rev B fabrication review','','**CAD checks pass. The package is ready for factory CAM review; ordering awaits process and RF-stackup acceptance.**','','BGA via-in-pad is intentionally allowed. No charger replacement is required. The board exposes all programming signals on J4, but physical flashing and a complete TI target firmware application have not been tested.','','| Check | Result |','|---|---|',f"| Board | 40 × 38 × 1 mm, four layers |",'| DRC / tsci check | 0 errors, 0 warnings |',f"| Routed copper | {r['counts']['pcbTraces']} traces; {m['uniqueVias']} unique through-vias |",'| Completeness | 0 unconnected ports, missing source traces or discontinuities |','| Programming | Five J4 connections pass routed continuity |','| PCB BOM | All 62 components have exact MPN/JLC codes |','| Export | Gerber exporter 0.0.104, unpatched; drill and BGA aperture audits pass |','','## Findings','']
for f in findings:lines.extend([f"### {f['id']} — {f['title']} ({f['status']})",'',f.get('resolution',f.get('requiredAction','')),''])
lines+=['## Deliverable and verification limits','','The CAM ZIP in `../fabrication/` contains the Gerbers, PCB-only BOM, CPL, assembly drawing, five schematic sheets, programming instructions, audit reports and hashes. CPL coordinates use the Gerbers’ board-center origin. Apply the included assembly requirements; this is not an approved order.','','`check:fabrication` remains nonzero for ASM-02 and RF-01. Neither is a DRC or tsci-check error. Factory acceptance must resolve them before tooling. The external battery/NTC must be selected and its charger/gauge settings verified before cell use; physical RF, charging, runtime and firmware validation remain prototype work.','','Circuit SHA-256: `'+h+'`. Manufacturing SHA-256: `'+d['manufacturingCircuitSha256']+'`.','','Sources: [TI CC2340R5](https://www.ti.com/lit/ds/symlink/cc2340r5.pdf), [TI BQ25150 land/stencil drawings](https://www.ti.com/lit/ds/symlink/bq25150.pdf), [TI BQ27427](https://www.ti.com/lit/ds/symlink/bq27427.pdf), [JLCPCB capabilities](https://jlcpcb.com/capabilities/pcb-capabilities).']
Path('docs/fabrication-review.md').write_text('\n'.join(lines)+'\n')
print(f'Recorded review: local CAD resolved; 2 factory acceptance items; {h}')