astra-abse/t113-s3

index.circuit.tsx

PCB

Schematic

import { T113S3Module } from "./src/T113S3Module";
export default () => (
  <board
    width={42}
    height={42}
    layers={4}
    minTraceWidth={0.1}
    defaultTraceWidth={0.1}
    minTraceToPadEdgeClearance={0.1}
    minViaHoleDiameter={0.2}
    minViaPadDiameter={0.45}
    minViaEdgeToPadEdgeClearance={0.1}
  >
    <schematicsheet name="Main" sheetWidth={432} sheetHeight={280}>
      <T113S3Module name="SOC" layoutProfile="lcd_top_storage_right" />
    </schematicsheet>
    <pcbnotetext
      pcbX={0}
      pcbY={20}
      text="T113-S3 / JLCPCB C5197687"
      fontSize={0.6}
    />
    <pcbnotetext
      pcbX={0}
      pcbY={19}
      text="LCD PD0-21: TOP  |  STORAGE PC2-7 + PF0-5: RIGHT"
      fontSize={0.35}
    />
    <pcbnotetext
      pcbX={0}
      pcbY={-20}
      text="127 EDGE EXITS  |  NC106 OPEN  |  0.10 mm TRACES"
      fontSize={0.4}
    />
  </board>
);