0hmX/am3352
This code suite comprises TypeScript scripts that analyze, verify, and assemble complex DDR memory interface hardware, focusing on physical routing, via and pad placement, electrical clearance, and physical constraints, often involving precise geometric calculations and consistent provenance tracking.
- Version
- 1.0.5
- License
- unset
- Stars
- 0
scripts/document-ddr-dq2-ram-side-replacement.ts
/** Record an exact parent witness for the solver-produced DQ2 replacement. */
import{readFileSync,writeFileSync}from'node:fs';import{resolve}from'node:path';import{createHash}from'node:crypto';import{objectHash as hash}from'./improve-ddr-a9-power-launches';
const parent=resolve('dist/ddr-twelve-dq1-partial-timing'),out=resolve('dist/ddr-dq2-ram-side-host'),paths=new Map<string,string>(),read=(p:string)=>{paths.set(p,createHash('sha256').update(readFileSync(p)).digest('hex'));return JSON.parse(readFileSync(p,'utf8'))},c=read(parent+'/candidate.circuit.json'),h=read(parent+'/host-bundle.json'),candidate=read(out+'/candidate.circuit.json'),host=read(out+'/host-bundle.json'),report=read(out+'/report.json'),before=h.traces.find((t:any)=>t.source_trace_id==='source_trace_577'),after=host.traces.find((t:any)=>t.source_trace_id==='source_trace_577');if(!report.accepted||h.traces.length!==12||host.traces.length!==12||h.traces.filter((t:any)=>t!==before).some((t:any)=>!host.traces.some((n:any)=>hash(n)===hash(t))))throw Error('Parent/accepted hosts differ');
const replacements=[{id:before.pcb_trace_id,before,after,beforeSha256:hash(before),afterSha256:hash(after),reason:'Replace exact overlong DQ2 host with existing-winding CPUtop route to new RAM-side through via; original CPU-side host via retires with old trace.'}];for(const p of c.filter((e:any)=>e.type==='pcb_copper_pour')){const n=candidate.find((e:any)=>e.type==='pcb_copper_pour'&&e.pcb_copper_pour_id===p.pcb_copper_pour_id);if(hash({...n,brep_shape:{...n.brep_shape,inner_rings:n.brep_shape.inner_rings.slice(0,-1)}})!==hash(p))throw Error('Expected exactly one appended void perplane');replacements.push({id:p.pcb_copper_pour_id,before:p,after:n,beforeSha256:hash(p),afterSha256:hash(n),reason:'Append one RAM-side DQ2 full-barrel antipad; alloldvoids and outerboundary remain exact, including unused originalCPUvia hole.'})}
const byBefore=new Map(replacements.map(r=>[r.beforeSha256,r.after])),expected=c.map((e:any)=>byBefore.get(hash(e))??e),multiset=(a:any[])=>a.map(hash).sort();if(hash(multiset(candidate))!==hash(multiset(expected)))throw Error('Undeclared candidate copper change');const manifest={captureHash:report.captureHash,parentDirectory:parent,parentCircuitSha256:hash(c),candidateCircuitSha256:hash(candidate),orderPreservedCandidateSha256:hash(expected),inputHashes:Object.fromEntries(paths),preservedHostCount:11,totalHostCount:12,oldFullPlanarMm:43.03214661368845,newFullPlanarMm:report.fullPlanarMm,replacements,validation:{exactObjectMultiset:true,onlyDeclaredReplacements:true,changedTraceIds:{before:before.pcb_trace_id,after:after.pcb_trace_id},sourceOwnerUnchanged:before.source_trace_id===after.source_trace_id,planesAppendOnly:true},scope:'Exact solver proposal witness, including trace-ID replacement and three append-onlyplanevoid changes. Twelvehostnominal geometry passes; DQ2stillneedsmatchingtoDQS0mean.'};writeFileSync(out+'/original-copper-replacements.json',JSON.stringify(manifest,null,2)+'\n');console.log(JSON.stringify({candidateSha256:hash(candidate),manifestSha256:hash(manifest),preserved:11,total:12,fullMm:report.fullPlanarMm}))